1. Field
Embodiments described herein relate generally to a non-volatile semiconductor storage device.
2. Description of the Related Art
Resistive memory devices that use variable resistance elements as storage elements have attracted increased attention as a likely candidate for replacing flash memory. As described herein, it is assumed that the resistive memory devices include Resistive RAM (ReRAM) in a narrow sense that uses a transition metal oxide as a memory layer and stores its resistance states in a non-volatile manner, as well as Phase Change RAM (PCRAM) that uses chalcogenide or the like as a memory layer to utilize the resistance information of crystalline states (conductors) and amorphous states (insulators), and so on.
It is known that the memory cells in resistive memory devices have two modes of operation. One is to set a high resistance state and a low resistance state by switching the polarity of the applied voltage, which is referred to as “bipolar type”. The other enables the setting of a high resistance state and a low resistance state by controlling the voltage values and the voltage application time, without switching the polarity of the applied voltage, which is referred to as “unipolar type”.
To achieve high-density memory cell arrays, the unipolar type is preferable. This is because that the unipolar type solution enables, without transistors, cell arrays to be configured by superposing variable resistance elements and rectifier elements, such as diodes, on respective intersections between bit lines and word lines. Moreover, large capacity may be achieved without an increase in cell array area by arranging such memory cell arrays laminated in a three-dimensional manner.
For unipolar-type ReRAM, data is written to a memory cell by applying a certain voltage to a variable resistance element for a short period of time. As a result, the variable resistance element changes from a high resistance state to a low resistance state. The operation of changing a variable resistance element from a high resistance state to a low resistance state is hereinafter referred to as the “set operation”.
On the other hand, data is erased from a memory cell by applying a certain voltage for a long period of time that is lower than the voltage applied in the set operation to a variable resistance element in its low resistance state after the set operation. As a result, the variable resistance element changes from a low resistance state to a high resistance state. The operation of changing a variable resistance element from a low resistance state to a high resistance state is hereinafter referred to as the “reset operation”. For example, a memory cell takes a high resistance state as a stable state (reset state), and, for binary storage, data is written to the memory cell by a set operation that causes a reset state to be switched to a low resistance state.
In addition, a read operation from a memory cell is performed by applying a certain voltage to a variable resistance element and monitoring at a sense amplifier circuit the current flowing through the variable resistance element (specifically, detecting a change in voltage of a bit line).
In such resistive memory devices, it is required to read as many memory cells as possible concurrently for improved reading speed. In this case, however, erroneous read may occur. As such, it is difficult to improve reading speed and reduce the likelihood of erroneous read at the same time.